The present invention is generally related to the field of integrated circuit fabrication and, more particularly, is related to masks employed in the fabrication of integrated circuits.
Lithography processing is a required and essential technology when manufacturing conventional integrated circuits. Many lithography techniques exist, and generally all lithography techniques are used for the purpose of defining geometries, features, lines, or shapes onto an integrated circuit die or wafer. In typical lithography, a radiation sensitive material such as photoresist is coated over the top surface of a die or wafer to selectively allow for the formation of the desired geometries, features, lines, or shapes.
One known method of lithography is optical lithography. The optical lithography process generally begins with the formation of a photoresist layer on the top surface of a semiconductor wafer. A mask including light non-transmissive opaque regions and fully light transmissive clear regions is then positioned over the photoresist coated wafer. The light non-transmissive opaque regions are usually formed of chrome and fully light transmissive clear regions are normally formed of quartz.
Light from a visible light source or an ultra-violet light source is then exposed to the mask. In almost all cases, the light is reduced and focused using an optical lens system, which contains one or several lenses, filters, and or mirrors. The light passes through the clear regions of the mask and exposes the underlying photoresist layer. The same light is blocked by the opaque regions of the mask, leaving corresponding underlying portions of the photoresist layer unexposed. The exposed photoresist layer is then developed, typically through chemical removal of the exposed/non-exposed regions of the photoresist layer. The end result is a semiconductor wafer coated with a photoresist layer exhibiting a desired pattern. This pattern can then be used for etching underlying regions of the wafer.
Since the first integrated circuits where created, the electronics industry has been driven to increase the number of transistors on a given size wafer. As a consequence, integrated circuit designers continue to design circuits with smaller minimum dimensions. However, prior to the work of Levenson, et. al., as reported in xe2x80x9cImproving Resolution in Photolithography with a Phase Shifting Mask,xe2x80x9d IEEE Transactions on Electron Devices, VOL., ED-29, November 12, December 1982, pp. 1828-1836, it was found that the traditional optical lithography process placed real limits on the minimum realizable dimension due to diffraction effects. Specifically, at integrated circuit design feature sizes of 0.5 microns or less, the best resolution has demanded a maximum obtainable numerical aperture (NA) of the lens systems. However, since the depth of field of the lens system is inversely proportional to the NA and the surface of the integrated circuit could not be optically flat, good focus could not be obtained when good resolution was obtained and vice versa. Consequently, as the minimum realizable dimension is reduced in manufacturing processes for semiconductors, the limits of optical lithography technology are being reached. In particular, as the minimum dimension approaches 0.1 microns, traditional optical lithography techniques will not work effectively.
With the desire of breaking through this minimum size barrier, one technique which has been developed as described by Levenson, et. al. is called phase shifting. In phase shifting, the destructive interference caused by two adjacent clear areas in an optical lithography mask is used to create an unexposed area on the photoresist layer. This is accomplished by making use of the fact that light passing through clear regions on a mask exhibits a wave characteristic such that the phase of the amplitude of the light exiting from the mask material is a function of the distance the light travels in the mask material. This distance is equal to the thickness of the mask material. By placing two clear areas adjacent to each other on a mask, one of thickness t1 and the other of thickness t2, one can obtain a desired unexposed area on the photoresist layer through interference. In particular, by specifying the thickness t2 such that (nxe2x88x921)(t2) is exactly equal to xc2xdxcex, where xcex is the wavelength of the light shining through the mask material and n is the refractive index of the material of thickness t1, the amplitude of the light exiting the material of thickness t2 is 180 degrees out of phase with the light exiting the material of thickness t1. Since the photoresist material is responsive to the intensity of the light and the opposite phases of light cancel where they overlap, a dark unexposed area will be formed on the photoresist layer at the point between the two clear regions of differing thicknesses. Phase shifting masks are well known and have been employed in various configurations as set out by B. J. Lin in the article, xe2x80x9cPhase-Shifting Masks Gain an Edge,xe2x80x9d Circuits and Devices, March 1993, pp. 28-35. The configuration described above has been called phase shift masking (PSM). In comparing the various phase shifting configurations, researchers have shown that the PSM method can achieve dimension resolution of 0.25 microns and lower.
Currently, phase shifting algorithms employed to design phase shift masks used according to the foregoing principles typically define a phase shifting area that extends just beyond active regions of an active layer. The remaining length of polysilicon, for example, is typically defined by a field mask. However, this approach is not without its problems. Specifically, alignment offsets between phase shift masks and field masks may result in kinks or pinched regions in the polysilicon lines as they transition from the phase shifting area to the field mask areas. Also, since the field masks are employed to print the dense, narrow lines of polysilicon beyond the active regions, the field masks become as critical and exacting as the phase shift masks.
In light of the forgoing, the present invention provides for a phase shift mask and a system and method for making the same. In one embodiment, the phase shift mask comprises a number of phase shifters that define a number of active gate areas. Each of the active gate areas is associated with one of a number of active regions of a predefined circuit. The phase shift mask also includes at least one joined phase shifter defining at least two of the active gate areas. The at least one joined phase shifter extends between at least two of the active regions.
This phase shift mask provides several advantages such as, for example, that the phase shift mask defines the polygons of polysilicon both in locations overlapping and between the active regions of a predefined circuit design. Thus, a field mask is not needed to define the polygons between the active regions. This minimizes any error introduced by the fact that both a phase shift mask and a field mask are employed to define the polygons as in the prior art.
In another embodiment, the present invention provides method for designing a phase shift mask. The present method includes the step of defining a number of phase shift regions that further define a number of active gate areas, where each of the active gate areas is associated with one of a number of active regions of a predefined circuit. The method also includes the step of defining a number of phase shifters by assigning a phase to each of the phase shift regions. The method further includes the step of defining a joined phase shifter by joining at least two of the phase shifters, where the two phase shifters are associated with different ones of the active regions and the phase shifters have the same phase assigned thereto.
In addition, the present invention also provides for a computer program embodied on a computer readable medium for designing a phase shift mask. The computer program includes logic to logic to define a number of phase shift regions that further define a number of active gate areas, where each of the active gate areas is associated with one of a number of active regions of a predefined circuit. The computer program also includes logic to define a number of phase shifters by assigning a phase to each of the phase shift regions, and, logic to define a joined phase shifter by joining at least two of the phase shifters, the two phase shifters being associated with different ones of the active regions, and the two of the phase shifters having a same phase assigned thereto.
Other features and advantages of the present invention will become apparent to a person with ordinary skill in the art in view of the following drawings and detailed description. It is intended that all such additional features and advantages be included herein within the scope of the present invention.